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Design Engineer at cadence in Cary, North Carolina | Swiftcruit
analog layoutVirtuosoDRCLVSPVSPegasusCMOSanalog circuitsUNIXLINUXscriptingMOSFETsBJTsparasitic extraction
Company Location
Cary, North Carolina, United States
Remote Work Policy
Hybrid
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Duties:
Research, design, develop, and test electronic components and systems for Electronic Design Automation (EDA) and semiconductor intellectual property (IP) employing knowledge of electronic theory and materials properties.
Leverage exposure to microelectronics design and requirements.
Understand layout effects on the circuit such as speed, capacitance, power and area.
Apply knowledge of various analog layout techniques like matching and shielding.
Implement high speed and high accuracy cells, blocks and IP blocks in a timely fashion with high quality and efficiency.
Work with custom layout designers from groups all over the world to build high quality IP and testchips.
Work with circuit designers from groups all over the world to understand their technical and schedule needs.
Collaborate with the Cadence R&D teams (Virtuoso, PVS developers) to help develop the layout editing and verification tools.
Some telecommuting permitted.
Qualifications:
Master’s in Electrical Engineering, Electronic Engineering, or related field
Minimum two (2) years of experience in the job offered or in a related engineering occupation.
Performing analog layout from top level floor planning down to complex block level
Cadence back-end design tools, including Virtuoso, Design Rule Checking (DRC) and Layout Versus Schematic (LVS) using Physical Verification System (PVS) and Pegasus
Utilizing deep sub-micron CMOS design nodes to create functional layouts suitable for manufacturing
Analog circuits including current mirrors, operational amplifiers, comparators and reference circuits
Utilizing UNIX/LINUX and scripting to automate and improve efficiency
Utilizing semiconductor devices, including diodes, MOSFETs and Bipolar Junction Transistors (BJTs), individually and collectively in microelectronic circuits
Analog IC layout practices, including analog matching techniques, device process effects, and minimizing Resistance and Capacitance (RC) parasitic extraction
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