The Cisco Silicon One Post-Silicon Electrical Validation (EPSV) team in Caesarea works on the fastest, most power-hungry networking chips in the industry. We are the hardware experts who take the raw silicon and prove it actually works in the real world. We don't just run scripts from a desk—we get our hands dirty in the lab physically probing boards and testing the limits of the hardware. Love sophisticated hardware puzzles? Want your work to directly impact mass production? This is the team to be in.
Lead hands-on lab debugging to fix complex silicon performance, characterization, and yield issues. Use bench findings and board-probing data to give feedback directly to the architecture and design teams. Lead ASIC bring-up on validation boards, focusing heavily on SerDes, high-speed interfaces, and power/clock domains. Run characterization across PVT (Process, Voltage, Temperature) conditions and analyse large datasets to resolve performance bottlenecks and improve chip yield. Write and optimize clean Python code to automate lab equipment and test internal chip logic. Serve as the technical lead for complex hardware debug, defining validation methodologies, and advanced lab measurement techniques for the team.
Be part of a team working on the most advanced silicon products in the market! Are you an engineer who prefers physical testing and measuring boards in the lab over just running validation scripts on a computer?, This is the place for you!. We value pure hardware talent and provide ample opportunities for professional advancement.
👉From Our Blog: https://blogs.cisco.com/sp/more-scale-more-intelligence-and-more-control-new-cisco-solutions-for-accelerating-ai-networking
👉G300 Chip: https://www.cisco.com/c/en/us/solutions/collateral/silicon-one/g300-wp.html
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