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Brampton, Ontario, Canada
Onsite
Become a member of our world-class software research and development team! Altera® develops programmable logic technologies to accelerate innovation for many customers worldwide.
You will be designing and developing leading-edge software innovations for Quartus, the tool that optimizes our FPGA devices, within a research-oriented team. The Quartus Placement optimization engines are key to unlocking high performance, area and power efficiency for our customer's design applications.
As part of the Quartus Placement team, your role will include:
Designing, developing, and improving placement algorithms for our FPGA CAD software tools
Implementing new features to leverage innovative FPGA hardware features, and improving the software performance, runtime and memory footprint
Developing enhanced usability features for customers to improve their design productivity
You will have the opportunity to work closely with and be mentored by technical leaders
Ideal candidates exhibit the following behavioral traits:
Intellectual curiosity and a passion for exploring new technology
Excellent problem-solving, debugging, and attention to detail
Great communication, teamwork, and interpersonal skills
Our compensation is designed to reflect the Canadian labour market. The actual salary offered may vary based on several factors, including the position’s location, as well as the candidate’s experience, skills, training, and job-specific knowledge. In addition to base salary, we offer performance-based incentive opportunities that reward both individual contributions and overall company success.
Estimated Salary Range: $125K – $135K CAD
We use artificial intelligence to screen, assess, or select applicants for the position. This posting is for an existing vacancy. Canadian work experience is not required for this role. Applicants must be eligible for any required Canada export authorizations.
Qualifications:
Relevant experience can be obtained through schoolwork, classes and project work, internships, and/or work experience.
Minimum Qualifications:
BS, MS or PhD degree in Computer Engineering, Engineering Science, Electrical Engineering, Computer Science or equivalent
2+ years C/C++ programming experience in a Linux and or Windows environment
Desired/Preferred Skills:
Experience coding in C++ for a high performance multi-core system
Experience developing EDA/CAD optimization algorithms for FPGAs or ASICs
Experience with Altera Quartus or AMD Vivado software
Experience with applying machine learning techniques to EDA software
Experience with combinatorial/continuous optimization, including but not limited to Boolean SAT, stochastic search-based methods, numerical methods for continuous optimization, dynamic programming, and applications to FPGA placement
Experience with NOC optimization for FPGA placement