Job Details:

Job Description:

We are looking for a passionate and energetic Software Engineer-Intern to join our team at Altera®.  Altera is the pioneer of programmable logic solutions, enabling system and semiconductor companies to rapidly and cost effectively innovate, differentiate and win in their markets.  Altera combines the programmable logic technology with software tools, intellectual property, and customer support to provide high-value programmable solutions to many customers worldwide. 

In this role, you will be researching/designing/developing/optimizing software for Quartus, the compiler that programs all current/next generation of Field Programmable Gate Array (FPGA) devices. 

• Quartus is used by all FPGA acceleration technologies (including High Level Synthesis, FPGA AI Suite, DSP Builder, etc) 

• At the heart of Quartus is our Place and Route engine which is responsible for transforming HDL to bits such that a user's design is optimized for area and Fmax 

• Cross-functional interactions with various customers (internal and external) 

• Best of both worlds, hardware and software: 

  • Customer's hardware requirements: Fmax, throughput, timing closure and area 

  • Compiler SW optimizations: runtime and memory, including abstractions and frameworks for acceleration with the FPGA for domains such as deep learning, DSP algorithms, or data analytics 

As part of the Quartus team, your responsibilities will include, but are not limited to: 

• Developing software support for successful routing of the latest next generation FPGA devices 

• Owning various modules of the compiler from device modeling to timing closure to runtime 

• Implementing new features in addition to root-causing and fixing the existing ones, while maneuvering your way through a big code base 

Qualifications:

Minimum Qualifications

The candidate must be currently pursuing a PhD in Electrical & Computer Engineering and experience in:

• Developing software support for successful routing of the latest next generation FPGA devices 

• Device modeling, timing closure and runtime 

• Implementing new features in addition to root-causing and fixing the existing ones

Job Type:

Student / Intern (Fixed Term)

Shift:

Shift 1 (United States of America)

Primary Location:

San Jose, California, United States

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.