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Lund, Sverige
Onsite
Category
Embedded Systems, Electrical Engineering or Computer Science
Scope
Two Master Thesis students, 30 hp each
Background
Axis has a long history of developing integrated circuits for our products. The series of ARTPEC chips is a cornerstone in most Axis products, as discussed here: Axis System-On-Chip, and ARTPEC-9. The ASIC department is working on developing new generations of the ARPTEC SoC using the most modern chip technology available. See also The history of ARTPEC.
In ASIC verification, constrained-random testing can exercise much of a design efficiently. However, reaching the remaining coverage targets often requires engineers to create targeted stimulus manually. This involves analyzing coverage reports, specifications, constraints, and testbench code, followed by repeated implementation, compilation, simulation, and debugging.
This thesis project will explore how an Agentic AI solution can support stimulus creation during coverage closure, which is essential bug-free hardware modules in the final SoC.
Goal
The goal is to adapt and tune the Agentic AI pipeline for coverage-directed stimulus creation and evaluate whether it can reduce engineering effort or elapsed time while producing valid, reproducible tests.
Working as a pair, you will:
The expected outcome is a tuned Agentic AI pipeline, a documented benchmark history, and an evidence-based assessment of where AI-assisted stimulus creation is useful—and where it falls short. Model-weight training or fine-tuning is not required; the main focus is on adapting the pipeline around the language model.
Who are you?
For this Thesis proposal we target students with a strong interest in Embedded Electronics Engineering, with a focus hardware development, including design and verification of digital solutions and a system on chip.
OK, I am interested! What do I do now?
You are valuable to us – how nice that you are interested in one of our proposals! There are a few things for you to keep in mind when applying.
Who to contact for any questions regarding the position!
Per Dagermo, Engineering Manager for the ASIC Verification team, at +46 46 272 1800.
Certain roles at Axis require background checks, which means applicable verifications will be done in these recruitments. Notice will be provided before we take any action.
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