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California, United States
Hybrid
ESSENTIAL FUNCTIONS
• Support semiconductor prototyping projects from technical intake through fabrication, metrology, packaging coordination, and production handoff.
• Translate customer requirements into executable fabrication process plans and assist with feasibility assessments.
• Serve as a technical liaison to partner university nanofabrication facilities and industry fabs; participate in recurring technical progress reviews.
• Assist with process development, recipe documentation, troubleshooting, and yield improvement efforts in nanofabrication environments.
• Coordinate wafer-to-package transitions and collaborate with packaging partners on assembly and test requirements.
• Support process transfer and readiness assessments across partner facilities.
• Collaborate with internal research teams on data-driven process optimization and AI/ML-enabled manufacturing analytics.
• Maintain documentation of process flows, metrology results, and partner capabilities.
MINIMUM QUALIFICATIONS• Bachelor’s degree in Electrical Engineering, Materials Science, Physics, or related field and 5+ years of industrial semiconductor fabrication experience;
• Working knowledge of semiconductor device physics and fabrication fundamentals.
• Experience supporting process development, troubleshooting, or yield improvement in a fabrication facility.
• Strong written and verbal communication skills and ability to collaborate across technical teams.
• Candidate must be a U.S. Person (U.S. citizen or lawful permanent resident).
PREFERRED QUALIFICATIONS
• Master’s degree in a related field and 2+ years of industrial semiconductor fabrication experience; OR
• PhD in a related field with 0–5 years of post-degree experience.
• Hands-on experience in micro- or nanofabrication (lithography, deposition, etch, metrology)
The annual base salary range for this position is $158,000 - $180,000. When extending an offer of employment, the University of Southern California considers factors such as (but not limited to) the scope and responsibilities of the position, the candidate’s work experience, education/training, key skills, internal peer equity, federal, state and local laws, contractual stipulations, grant funding, as well as external market and organizational considerations.
MOSIS 2.0 seeks a Microelectronics Fabrication & Process Integration Engineer to translate innovative semiconductor process designs into fabricated and packaged hardware through a network of university and industry fabrication partners.
USC is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability, or any other characteristic protected by law or USC policy. USC observes affirmative action obligations consistent with state and federal law. USC will consider for employment all qualified applicants with criminal records in a manner consistent with applicable laws and regulations, including the Los Angeles County Fair Chance Ordinance for employers and the Fair Chance Initiative for Hiring Ordinance, and with due consideration for patient and student safety. Please refer to the Background Screening Policy Appendix D for specific employment screen implications for the position for which you are applying.
We provide reasonable accommodations to applicants and employees with disabilities. Applicants with questions about access or requiring a reasonable accommodation for any part of the application or hiring process should contact USC Human Resources by phone at (213) 821-8100, or by email at uschr@usc.edu. Inquiries will be treated as confidential to the extent permitted by law.
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