At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Duties:
- Utilizing engineering background, provide pre-sales and/or post-sales technical customer support including implementation, training, and maintenance support for Electronic Design Automation (EDA) and semiconductor intellectual property (IP).
- Perform Static Timing Analysis (STA), glitch, noise analysis, extraction using Cadence Signoff tools.
- Work efficiently with Research & Development (R&D) and customer to enable various timing analysis and ECO flows.
- Perform timing correlation, tool feature benchmarking, constraints validation, spice analysis on various tech nodes and customer designs.
- Work on in-design timing ECO (Engineering Change Order) optimizations solutions.
- Present to customers the technical capabilities of Cadence Digital Implementation and Signoff tools and flows (Synthesis, Place and Route, Timing/Physical/Power).
- Recognize opportunities for products at existing customers or potential customers, and work with account team to define and execute technical campaigns.
- Support adoption and proliferation at existing customers (on/offsite) to help drive increasing business for our digital implementation tools.
- Deliver technical trainings and seminars within Cadence and customer sites.
- May telecommute.
- Must be available to work on projects at various, unanticipated sites throughout the United States.
Qualifications:
- Master’s degree in Electrical Engineering, Electronic Engineering, or related field
- Minimum nine (9) years of experience in the job offered or in a related engineering occupation
- Automate flows using scripting languages including Perl, Tcl, and Python
- Floorplanning, powerplanning, placement, clock tree synthesis (CTS) and routing and place and route tool knowledge
- Physical verification including DRC/LVS, antenna, EM/IR analysis and signal integrity analysis
- Static Timing Analysis (STA)
- Synthesis for improving results
- ECO flows and methodologies
- Engineering support for EDA tools like IC Compiler II and Fusion Compiler, debug physical design implementation failures, resolve errors, identify tool bugs, and analyze convergence issues
- Evaluation and deployment of new EDA tools and features
- Must be available to work on projects at various, unanticipated sites throughout the United States.
The annual salary range for California is $200,230 to $228,800. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the base salary range is a guideline, and individual total compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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