At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
U.S. Citizenship Required
We offer amazing opportunities to grow, no matter where you are in your career.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
The Cadence Advantage
- The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
- Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
- The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
- Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
- You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.
Responsibilities:
- Developing microarchitecture specifications to meet customer requirements
- Estimating effort and schedule required to complete design tasks.
- Coordinating with design verification teams to assist in: The development and refinement of verification plans.Functional and code coverage closure
- Developing RTL from microarchitecture specifications, leveraging AI agents when/where possible.
- Assessing RTL quality via code linting
- Analyzing clock domain crossings (CDCs) and reset domain crossings (RDCs) within RTL design, mitigating issues as necessary.
- Developing and maintaining quality timing constraints used during RTL synthesis, physical design implementation, and timing clsoure.
- Assessing design quality via RTL synthesis
- Coordinating with physical design implementation teams to deliver RTL and constraints.
- Running early RTL-based power analyses
- Analyze design tradeoffs to meet PPA targets.
Minimum Requirements:
- U.S. Citizenship
- Education (one of the following): Bachelor's Degree in Computer or Electrical Engineering + 4 years of related experienceMaster's Degree in Computer or Electrical Engineering +2 years of related experiencePhD in Computer or Electrical Engineering
- Ability to communicate and present comprehensibly with both fellow employees and customers
- Strong knowledge of digital design fundamentals and Verilog/SystemVerilog (SV).
- Experience with timing constraint development and management
- Hands on scripting languages like Python, Perl, TCL, Unix shell, etc.
- Familiarity with C programming
- Familiarity with revision control and bug tracking systems.
- Ability to innovate and automate repetitive tasks.
Preferred Requirements:
- Experience with CDC/RDC
- Experience with RTL synthesis
- Experience with Power Analysis
- Familiarity with Cadence Digital EDA Tools specific to front-end design (Xcelium, JasperGold, Joules, Genus)
Be proud and passionate about the work you do. Together, our One Cadence -- One Team culture drives our success.
We’re doing work that matters. Help us solve what others can’t.
