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San Jose, California, United States, United States of America
Onsite
About Altera
At Altera™, our independence as the world’s largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.
About the Role
Altera is seeking a Senior Director, Silicon Architecture and Design Engineering to lead the development and execution of next-generation silicon solutions across our programmable device portfolio. This is a senior engineering leadership role responsible for building and leading high-performing silicon teams, driving complex SoC and ASIC development programs, and partnering across architecture, design, verification, implementation, validation, product engineering, and manufacturing to deliver high-quality silicon to market.
The ideal candidate will bring deep experience leading large-scale silicon organizations and complex cross-functional programs spanning architecture, RTL design, verification, emulation, DFT, physical design, post-silicon validation, and production readiness. This leader will play a key role in shaping silicon strategy, scaling engineering capability, and driving execution excellence for advanced FPGA, SoC, and platform technologies supporting AI, cloud, networking, and edge applications.
Responsibilities
Lead and grow a high-performing silicon engineering organization responsible for the development and delivery of complex FPGA, ASIC, and SoC products across Altera’s programmable solutions portfolio.
Provide organizational and technical leadership for end-to-end silicon development, spanning product definition, architecture, microarchitecture, RTL design, verification, DFT, emulation, implementation, bring-up, validation, and production ramp.
Build, mentor, and scale teams of silicon engineers across multiple functional domains, including design, front-end engineering, SoC integration, and cross-functional program execution, while establishing a strong culture of accountability, innovation, and technical excellence.
Drive execution of large, complex silicon programs with responsibility for planning, prioritization, resource alignment, milestone tracking, risk management, and delivery against aggressive performance, quality, cost, and schedule targets.
Partner closely with architecture, software, systems, product planning, physical design, product engineering, manufacturing, and business leadership to translate product requirements into executable silicon roadmaps and development plans.
Lead cross-functional decision-making on architectural tradeoffs, silicon integration strategy, IP reuse, design methodology, and execution risk across performance, power, area, cost, manufacturability, and schedule.
Oversee the development of high-performance silicon subsystems and SoC architectures supporting programmable logic, compute acceleration, system interconnect, networking, memory, security, and infrastructure-class applications.
Drive engineering process improvements, scalable design methodologies, KPI-based execution frameworks, and automation strategies to improve quality, predictability, and development velocity across the silicon organization.
Collaborate with post-silicon validation, manufacturing, diagnostics, and product engineering teams to ensure robust bring-up, debug readiness, test coverage, yield optimization, and successful product ramp into production.
Represent silicon engineering in executive reviews, roadmap planning, and cross-functional leadership forums by clearly communicating program status, key technical decisions, risks, mitigation strategies, and resource needs.
Partner with external ecosystem stakeholders including foundry partners, IP vendors, EDA vendors, and manufacturing suppliers to support successful execution of silicon programs and long-term roadmap planning.
Contribute to long-range engineering strategy by identifying organizational needs, technical investment areas, process improvements, and future capabilities required to scale Altera’s silicon roadmap.
Salary Range
The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
$231,500 - $330,000 USD
We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.
Minimum Qualifications
Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field and 15+ years of experience in silicon engineering, semiconductor product development, ASIC development, SoC development, or FPGA engineering.
10+ years of experience in networking and Ethernet technologies, including architecture, silicon development, or product development for networking, switching, interconnect, or data center infrastructure applications.
10+ years of experience leading and/or working across multiple phases of the silicon development lifecycle, including architecture, microarchitecture, RTL design, verification, DFT, software/firmware, emulation, physical design, post-silicon validation, and production.
Preferred Qualifications
Master’s degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Experience leading silicon development at advanced process nodes and delivering high-complexity SoCs or ASICs into production.
Background in one or more of the following areas: networking silicon, data center infrastructure, AI/ML hardware acceleration, storage systems, security silicon, high-speed interconnect, packet processing, or cloud-scale platform architecture.
Experience with FPGA architectures, programmable logic devices, or heterogeneous SoC platforms.
Knowledge of silicon security technologies such as secure boot, hardware root of trust, device lifecycle management, trust anchors, or hardware-based cryptographic acceleration.
Track record of building new teams, driving organizational transformation, and improving silicon execution through methodology, automation, and process innovation.
Experience working with external partners including foundries, IP vendors, EDA vendors, OSATs, or contract manufacturers in support of silicon delivery