Senior Emulation Engineer

Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. 

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Build, bring up, and maintain large-scale hardware emulation and FPGA prototyping platforms for memory-centric computing SoCs, enabling pre-silicon hardware and software validation.
• Partition and map complex multi-million-gate designs onto emulation systems and multi-FPGA prototypes, optimizing for capacity, run-time performance, and debug visibility.
• Develop transactors, speed bridges, and co-emulation (SCE-MI) environments that connect the design under test to host software and virtual or physical interfaces.
• Model memory subsystems, clock and reset schemes, and high-speed I/O interfaces for accurate, high-throughput emulation and prototyping.
• Enable early firmware, driver, and software bring-up by delivering stable emulation and prototype targets with robust debug infrastructure.
• Run AI/ML workloads and performance benchmarks pre-silicon to validate functionality and system-level performance.
• Debug complex hardware and software issues using waveform capture, assertions, and coverage, driving root-cause analysis together with design, verification, and software teams.
• Make trade-offs between emulation and prototyping — capacity, speed, bring-up time, and debug — to select the right platform for each project milestone.
• Develop and automate emulation and prototyping flows (compile, partitioning, and build) using scripting and agentic AI tools and frameworks to improve turnaround time and quality of results.
• Communicate effectively with stakeholders, including users, partners, and management, to ensure that designs are delivered on time and within budget.
• Complete other responsibilities as assigned.

What You Bring

• Bachelor’s with 5+ years, or Master’s with 3+ years, or PhD's with 0+ years of industry experience.
• Strong background in pre-silicon verification, validation, and SoC bring-up.
• 5+ years of experience in both FPGA prototyping and large-scale hardware emulation of complex ASIC/SoC designs.
• Hands-on experience with large-scale emulation platforms such as Cadence Palladium, Synopsys ZeBu, or Siemens Veloce.
• Hands-on experience with FPGA prototyping platforms such as Synopsys HAPS or Cadence Protium, including multi-FPGA design partitioning and timing closure.
• Experience with transactors, co-emulation (SCE-MI), speed bridges, and standard interface protocols such as PCIe, DDR/HBM, AXI/CHI, or Ethernet.
• Proficiency in Verilog/SystemVerilog and in design bring-up, clocking, reset, and memory modeling for emulation and prototyping.
• Proficiency in scripting (Tcl, Python, or Perl) for emulation and prototyping flow automation; familiarity with agentic AI tools and frameworks is a plus.
• Experience running AI/ML workloads or system-level software pre-silicon.
• Strong analytical and problem-solving skills
• Excellent communication and interpersonal skills
• Ability to work independently and as part of a team
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.