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Bengaluru, Karnataka, India
Hybrid
This position is listed on behalf of a partner company, who manages all applications and next steps. Our partner is looking for a Senior Principal Engineer – FPGA based in India.
As a Senior Principal Engineer – FPGA, you will provide technical leadership in the design, development, and certification of advanced FPGA-based solutions for aerospace and avionics applications. You will lead the creation of high-performance, reusable FPGA architectures while overseeing complex development projects from initial concept through verification and certification. A major focus will be ensuring compliance with DO-254 standards and driving lifecycle management strategies for FPGA and ASIC technologies. Working closely with multidisciplinary engineering teams, you will optimize system performance, reliability, and efficiency while evaluating next-generation technologies and design methodologies. You will also guide technical decisions, mentor engineering professionals, and contribute to continuous innovation across product development. This hybrid opportunity offers the chance to work on sophisticated aerospace technologies with global engineering teams.
In this role, you will lead FPGA engineering initiatives, drive technical excellence, and ensure the successful development and certification of avionics products. Your main responsibilities will include:
Lead the design and development of high-performance, reusable FPGA architectures across multiple aerospace product lines.
Oversee DO-254 compliance and certification activities for FPGA-based avionics products, including planning, development, verification, validation, and certification documentation.
Coordinate with engineering, quality, and certification teams to ensure adherence to DO-254 processes and successful product certification.
Collaborate with systems engineers, hardware designers, embedded software developers, and testing teams to ensure seamless product integration.
Define and lead timing closure strategies and performance optimization initiatives to meet real-time latency, throughput, and power requirements.
Manage FPGA and ASIC obsolescence across product portfolios, including lifecycle monitoring, risk assessments, alternative component evaluations, and redesign or migration strategies.
Lead FPGA development using Model-Based Design methodologies with MATLAB and Simulink, covering algorithm modelling, simulation, implementation, and verification.
Evaluate and recommend next-generation FPGA families, intellectual property (IP) cores, high-speed transceivers, and engineering tools to improve performance and reduce technical risks.
Develop and review technical documentation, including design specifications, interface control documents, verification plans, and executive-level reports.
Guide the selection, deployment, and optimization of FPGA Electronic Design Automation (EDA) tools, design automation systems, and continuous integration practices.
Mentor engineers at different experience levels, providing technical guidance on complex design decisions, architecture, and performance trade-offs.
Leverage AI tools to improve engineering workflows and guide team members in adopting relevant AI-driven solutions.
Communicate technical progress, challenges, and recommendations to engineering teams, program management, senior leadership, and customers.
The ideal candidate is an experienced FPGA engineering leader with extensive aerospace industry knowledge, strong technical expertise, and a proven track record of delivering complex hardware development and certification projects. The following qualifications are expected:
Engineering degree with at least 15 years of relevant professional experience in FPGA/ASIC design and verification.
Proven experience leading multiple FPGA/ASIC development projects for aerospace products, from initial concept through DO-254 certification.
Strong experience managing FPGA/ASIC obsolescence redesign initiatives and associated DO-254 certification activities.
Hands-on experience with FPGA development using Model-Based Design methodologies and MATLAB.
Experience with high-speed serial communication protocols and image and video processing technologies.
Strong technical expertise in VHDL and SystemVerilog (SV), including Universal Verification Methodology (UVM).
Demonstrated ability to lead complex technical projects, manage customer interactions, and present technical updates to senior leadership.
Strong communication and stakeholder management skills, with the ability to collaborate across engineering, program management, and customer-facing teams.
Excellent technical documentation and presentation abilities, including the capacity to communicate project progress and technical decisions effectively.
Additional qualifications that would be an advantage:
Experience with change management, Earned Value Management (EVM), and lifecycle program management.
Familiarity with Microsoft Project, Subversion, Jira, Jama, DOORS, and other engineering documentation and project management tools.
Ability to work effectively with multidisciplinary teams and stakeholders across different organizational levels.
Experience mentoring engineers and guiding technical teams through complex engineering challenges.
Hybrid working arrangement in Bengaluru, India.
Comprehensive group health insurance.
Group term life insurance.
Group personal accident insurance.
18 days of annual vacation leave.
12 days of annual contingency leave.
Meal coupons and meal vouchers.
Employee scholarship program.
Car lease program.
National Pension Scheme (NPS).
Leave Travel Allowance (LTA).
Fuel and vehicle maintenance allowances, including driver wages.
Work-life balance initiatives.
Opportunities to work on advanced aerospace and avionics technologies.
Exposure to the complete hardware product lifecycle, from requirements definition through verification and certification.
Opportunities to develop expertise in international aerospace certification standards and next-generation FPGA technologies.
Collaboration with global engineering professionals and multidisciplinary technical teams.